Residential College | false |
Patent Number | TWI446723B |
Status | 已授權 Granted |
類比至數位轉換器電路 | |
Alternative Title | Analog to Digital Converter Circuit |
Year Issued | 2014 |
2014-07-21 | |
Application Number | 100107757 |
Application Date | 2011-03-08 |
Rights Holder | University of Macau |
Sin,S-W(冼世荣); Ding L(丁立); Zhu Y(诸嫣); Wei HG(魏和功); Chan CH(陈知行); Chio UF(赵汝法); U SP(余成斌); Martins,R(马许愿); Franco,M | |
Country | 中華民國 |
Subtype | 发明专利 Invention |
Abstract | 本發明提供一種類比至數位轉換器(ADC)電路,其包含兩個時間交錯連續漸近暫存器(SAR)ADC。該兩個時間交錯SAR ADC每一者包含:第一級SAR子ADC;餘數放大器;第二級SAR子ADC;以及數位式錯誤校正邏輯。時間交錯路徑是共用該餘數放大器。該餘數放大器具有低增益,並以次臨界值操作,以達到電力效率高的設計。 |
Other Abstract | The present invention provides an analog-to-digital converter (ADC) circuit comprising two time-interleaved successive approximation register (SAR) ADCs. Each of the two time-interleaved SAR ADCs comprises a first stage SAR sub-ADC, a residue amplifier, a second stage SAR sub-ADC and a digital error correction logic. The residue amplifier is shared between the time-interleaved paths, has a reduced gain and operates in sub-threshold to achieve power effective design |
Language | 英語English |
Open (Notice) Number | TW201242261A |
IPC Classification Number | H03m1/12 |
CPC Classification Number | H03m1/1225 ; H03m1/0695 ; H03m1/1215 ; H03m1/164 ; H03m1/468 |
URL | View the original |
Document Type | Patent |
Collection | Faculty of Science and Technology INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Affiliation | University of Macau |
First Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Sin,S-W(冼世荣),Ding L(丁立),Zhu Y(诸嫣),等. 類比至數位轉換器電路. TWI446723B[P]. 2014-07-21. |
APA | Sin,S-W., Ding L., Zhu Y., Wei HG., Chan CH., Chio UF., U SP., Martins,R., & Franco,M (2011-03-08). 類比至數位轉換器電路. |
Files in This Item: | Download All | |||||
File Name/Size | Publications | Version | Access | License | ||
TWI446723B.pdf(524KB) | 专利 | 开放获取 | CC BY-NC-SA | View Download |
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