UM

Browse/Search Results:  1-7 of 7 Help

Selected(0)Clear Items/Page:    Sort:
A power-efficient capacitor structure for high-speed charge recycling SAR ADCs Conference paper
Zhu Y., Chio U.-F., Wei H.-G., Sin S.-W., Upa S.-P., Martins R.P.. A power-efficient capacitor structure for high-speed charge recycling SAR ADCs[C], 2008, 642-645.
Authors:  Zhu Y.;  Chio U.-F.;  Wei H.-G.;  Sin S.-W.;  Upa S.-P.; et al.
Favorite | TC[Scopus]:21 | Submit date:2019/02/11
Frequency-downconversion and if channel selection A-DQS sample-and-hold pair for two-step-channel-select low-if receiver Conference paper
Pui-In Mak, Chi-Sam SOU, Seng-Pan U, R.P. Martins. Frequency-downconversion and if channel selection A-DQS sample-and-hold pair for two-step-channel-select low-if receiver[C], 2003, 479-482.
Authors:  Pui-In Mak;  Chi-Sam SOU;  Seng-Pan U;  R.P. Martins
Favorite | TC[WOS]:3 TC[Scopus]:5 | Submit date:2019/02/11
Analag-double Quadrature Sampling  Channel Selection  Complex Low-if Receiver  Frequency Downconversion  
A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement Conference paper
Pui-In Mak, Seng-Pan U, R.P. Martins. A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement[C], 2003, 631-634.
Authors:  Pui-In Mak;  Seng-Pan U;  R.P. Martins
Favorite | TC[Scopus]:3 | Submit date:2019/02/11
Complex-if Receiver  Dcs1800  Double Quadrature Sampling/down-conversion  I/q Mismatch  Image-rejection  
N-path multirate sigma-delta modulator for high-frequency applications Conference paper
Lou F., Seng-Pan U., Martins R.P.. N-path multirate sigma-delta modulator for high-frequency applications[C], 2002, 315-318.
Authors:  Lou F.;  Seng-Pan U.;  Martins R.P.
Favorite | TC[WOS]:0 TC[Scopus]:1 | Submit date:2019/02/11
A modular approach for high Q microwave CMOS Active Inductor design Conference paper
Chiang K.H., Chiang K.V., Lam K.F., Choi W.W., Tarn K.W., Martins R.. A modular approach for high Q microwave CMOS Active Inductor design[C]. IEEE, JOUNIEH, LEBANON:LEBANON, 2000, 41-44.
Authors:  Chiang K.H.;  Chiang K.V.;  Lam K.F.;  Choi W.W.;  Tarn K.W.; et al.
Favorite | TC[WOS]:1 TC[Scopus]:3 | Submit date:2019/02/11
A novel half-band SC architecture for efficient analog impulse sampled interpolation Conference paper
Pan, S.-U., Martins, R.P., Franca, J.E.. A novel half-band SC architecture for efficient analog impulse sampled interpolation[C]. Institute of Electrical and Electronics Engineers Inc., 1998, 389-393.
Authors:  Pan, S.-U.;  Martins, R.P.;  Franca, J.E.
Favorite | TC[Scopus]:2 | Submit date:2018/11/06
New impulse sampled IIR switched-capacitor interpolators Conference paper
Seng Pan U., Martins R.P., Franca J.E.. New impulse sampled IIR switched-capacitor interpolators[C], 1996, 203-206.
Authors:  Seng Pan U.;  Martins R.P.;  Franca J.E.
Favorite | TC[WOS]:0 TC[Scopus]:3 | Submit date:2019/02/11