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A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces Conference paper
MoonHyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E.J. Chichilnisky, Boris Murmann, Dante G. Muratore. A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces[C], IEEE Xplore:IEEE, 2023.
Authors:  MoonHyung Jang;  Wei-Han Yu;  Changuk Lee;  Maddy Hays;  Pingyu Wang; et al.
Favorite | TC[Scopus]:5 | Submit date:2023/08/02
Brain  Compression  Interface  Neural  Recording  
A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory Conference paper
Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak, Rui P. Martins, Boris Murmann. A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory[C], 2021, 326-329.
Authors:  Wei-Han Yu;  Massimo Giordano;  Rohan Doshi;  Minglei Zhang;  Pui-In Mak; et al.
Favorite | TC[WOS]:7 TC[Scopus]:8 | Submit date:2021/10/28
Deep Neural Networks  Hardware Accelerators  In-memory Computing  Mixed-signal Integrated Circuits  Switched Capacitor Circuits  
A 7-bit 2 GS/s Time-Interleaved SAR ADC with Timing Skew Calibration Based on Current Integrating Sampler Journal article
Jiang,Wenning, Zhu,Yan, Chan,Chi Hang, Murmann,Boris, Martins,Rui Paulo. A 7-bit 2 GS/s Time-Interleaved SAR ADC with Timing Skew Calibration Based on Current Integrating Sampler[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 68(2), 557-568.
Authors:  Jiang,Wenning;  Zhu,Yan;  Chan,Chi Hang;  Murmann,Boris;  Martins,Rui Paulo
Favorite | TC[WOS]:25 TC[Scopus]:33  IF:5.2/4.5 | Submit date:2021/03/04
Analog-to-digital Converter  Sar Adc  Time-interleaved Adc  Current Integrating Sampler  Background Timing Skew Calibration  Timing Skew  
Metastablility in SAR ADCs Journal article
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Boris Murmann, Seng-Pan U, R. P. Martins. Metastablility in SAR ADCs[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2017, 64(2), 111-115.
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Boris Murmann;  Seng-Pan U; et al.
Favorite | TC[WOS]:15 TC[Scopus]:16  IF:4.0/3.7 | Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Comparator  Metastability  Successive Approximation Register (Sar)