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34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC Conference paper
Yuan, Yiyang, Yang, Yiming, Wang, Xinghua, Li, Xiaoran, Ma, Cailian, Chen, Qirui, Tang, Meini, Wei, Xi, Hou, Zhixian, Zhu, Jialiang, Wu, Hao, Ren, Qirui, Xing, Guozhong, Mak, Pui In, Zhang, Feng. 34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 576-578.
Authors:  Yuan, Yiyang;  Yang, Yiming;  Wang, Xinghua;  Li, Xiaoran;  Ma, Cailian; et al.
Favorite | TC[Scopus]:2 | Submit date：2024/05/16