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SIN SAI WENG [1]
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Conference paper [1]
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2012 [1]
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英語English [1]
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A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS
Conference paper
Guohe Yin, He-Gong Wei, U–Fat Chio, Sai-Weng Sin, Seng-Pan U, Zhihua Wang, Rui Paulo Martins. A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS[C], 2012, 377-380.
Authors:
Guohe Yin
;
He-Gong Wei
;
U–Fat Chio
;
Sai-Weng Sin
;
Seng-Pan U
; et al.
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Submit date:2019/02/11
Analgo-to-digital Converter
Successive Approximation Register
Ultra-low Power
Sensor Applications