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A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation Conference paper
ZHANG RAN, UN KA FAI, GUO MINGQIANG, QI LIANG, XU DENGKE, ZHAO WEIBING, RUI P. MARTINS, FRANCO MALOBERTI, SIN SAI WENG. A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation[C]:IEEE, 2024.
Authors:  ZHANG RAN;  UN KA FAI;  GUO MINGQIANG;  QI LIANG;  XU DENGKE; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/08/19
Machine Learning  Edge Computation  Computing-in-memory  Delta-sigma Converter  Floating Inverter Amplifier  
A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator Journal article
Zhang, Hongshuai, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. A Second-Order NS Pipelined SAR ADC with Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator[J]. IEEE Journal of Solid-State Circuits, 2023, 58(12), 3565-3575.
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Martins, Rui P.;  Chan, Chi Hang
Favorite | TC[WOS]:2 TC[Scopus]:4  IF:4.6/5.6 | Submit date：2024/01/02
Analog-to-digital Converter (Adc)  Auxiliary Noise Shaping (Ns) Successive-approximation Register (Sar) Adc  Capacitor Stacking  Data-weighted Averaging And detect-And-skip (Dwa And Das)  Differential Sampling  Energy Efficient  Error SupprEssion (Es) And Reconstruction  Gain Error Shaping (Ges)  Partial Time Interleaving  Passive Ns  Pipelined Sar  Quantization Predication Unrolled  Two-step Floating Inverter Amplifier (Fia)  
A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier Journal article
Jiang,Wenning, Chen,Chixiao, Liu,Qi, Liu,Ming, Zhu,Yan, Chan,Chi Hang, Xu,Hao, Martins,Rui P.. A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier[J]. IEEE Journal of Solid-State Circuits, 2023, 58(10), 2709 - 2721.
Authors:  Jiang,Wenning;  Chen,Chixiao;  Liu,Qi;  Liu,Ming;  Zhu,Yan; et al.
Favorite | TC[WOS]:4 TC[Scopus]:3  IF:4.6/5.6 | Submit date：2023/08/03
Adaptive Bias  Analog-to-digital Converter (Adc)  Floating Inverter Amplifier (Fia)  Pipelined-successive-approximation-register (Sar) Adc  Reference Ripple Cancellation (Rrc)  Reference Ripple Neutralization (Rrn)  
A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement Journal article
Yu, Wei-Han, Peng, Xingqiang, Mak, Pui-In, Martins, Rui P.. A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64(11), 2844-2857.
Authors:  Yu, Wei-Han;  Peng, Xingqiang;  Mak, Pui-In;  Martins, Rui P.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:5.2/4.5 | Submit date：2018/10/30
Aa Battery  Antenna Impedance Mismatch  Class-d  Cmos  Digital Am Modulation  Dynamic Matching Network (Dmn)  Error-vector Magnitude (Evm)  Inverter Chain  Leakage Current  Matching Network (Mn)  Polar  Power Amplifier (Pa)  Power-added Efficiency (Pae)  Power Gating  
An 18-Gb/s fully integrated optical receiver with adaptive cascaded equalizer Journal article
Pan Q., Wang Y., Lu Y., Yue C.P.. An 18-Gb/s fully integrated optical receiver with adaptive cascaded equalizer[J]. IEEE Journal on Selected Topics in Quantum Electronics, 2016, 22(6).
Authors:  Pan Q.;  Wang Y.;  Lu Y.;  Yue C.P.
Favorite | TC[WOS]:24 TC[Scopus]:29 | Submit date：2019/02/14
Adaptive Equalizer  Continuous-time Linear Equalizer (Ctle)  Dc Offset Cancellation  Inverter-based Cascode Transimpedance Amplifier  Limiting Amplifier (La)  Low Dropout Regulator  Optical Receivers  Optoelectronic Integrated Circuits  Silicon Photodetector  
A 2 × VDD-enabled mobile-TV RF front-end with TV-GSM interoperability in 1-V 90-nm CMOS Journal article
Pui-In Mak, Rui P. Martins. A 2 × VDD-enabled mobile-TV RF front-end with TV-GSM interoperability in 1-V 90-nm CMOS[J]. IEEE Transactions on Microwave Theory and Techniques, 2010, 58(7), 1664-1676.
Authors:  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:13 TC[Scopus]:15 | Submit date：2018/10/30
Attenuator  Cmos  Dvb-h  Gsm-rejection Filter  High-voltage Circuits  Inverter Amplifier  Isdb-t  Low-noise Amplifier (Lna)  Mediaflo  Mixer  Mobile Tv  Rf Integrated Circuit (Rfic)  T-dmb  Tv-gsm Interoperation  Tv Tuner  Ultrahigh Frequency (Uhf)  Uhf), Very High Frequency