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A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector Conference paper
Ge, Xinyi, Chen, Yong, Wang, Lin, Qi, Nan, Mak, Pui In, Martins, Rui P.. A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2022.
Authors:  Ge, Xinyi;  Chen, Yong;  Wang, Lin;  Qi, Nan;  Mak, Pui In; et al.
Favorite | TC[WOS]:4 TC[Scopus]:5 | Submit date:2023/01/30
Bang-bang Phase Detector (Bbpd)  Charge Steering  Clock And Data Recovery (Cdr)  Cmos  Half Rate  Non- Return-to-zero (Nrz)  Quadrature Voltage-controlled Oscillator (Qvco)  Return-to-zero (Rz)  Rz-to-nrz Converter  
A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS Journal article
He, Jian, Zhang, Yuguang, Liu, Han, Liao, Qiwen, Zhang, Zhao, Li, Miaofeng, Jiang, Fan, Shi, Jingbo, Liu, Jian, Wu, Nanjian, Chen, Yong, Chiang, Patrick Yin, Yu, Ningmei, Xiao, Xi, Qi, Nan. A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2022, 69(3), 1159-1170.
Authors:  He, Jian;  Zhang, Yuguang;  Liu, Han;  Liao, Qiwen;  Zhang, Zhao; et al.
Favorite | TC[WOS]:10 TC[Scopus]:12  IF:5.2/4.5 | Submit date:2022/03/28
Artificial Transmission Line (t-Line)  Cmos  Distributed Driver  Extinction Ratio (Er)  Feed-forward Equalizer (Ffe)  High-swing  Mach-zehnder Modulator (Mzm)  Nrz  Optical Interconnects  Pam-4  Push-pull  Silicon-photonics  
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS Journal article
Zhao,Xiaoteng, Chen,Yong, Mak,Pui In, Martins,Rui P.. A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 68(1), 89-102.
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite | TC[WOS]:21 TC[Scopus]:21  IF:5.2/4.5 | Submit date:2021/03/09
Bang- Bang Clock And Data Recovery (Bbcdr)  Bang-bang Phase Detector (Bbpd)  Cmos  Four- And Eight-level Pulse Amplitude Modulation (Pam-4/-8)  Half Rate  Hogge And alexAnder Pd  Jitter Tolerance (Jtol).  Jitter Transfer Function (Jtf)  Non-return-to-zero (Nrz)  Strongarm Comparator  
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS Conference paper
Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui P. Martins. A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS[C]:IEEE, 2019, 229-232.
Authors:  ; et al.
Favorite | TC[WOS]:6 TC[Scopus]:7 | Submit date:2021/03/09
4-/8-level Pulse Amplitude Modulation (Pam-4/8)  Bang-bang Phase Detector (Bbpd)  Clock And Data Recovery (Cdr)  Half Rate  Non-return To Zero (Nrz)  Strongarm Comparator  Voltage-to-current (V/i) Converter  Xor  
A 0.002-mm2 6.4-mW 10-Gb/s full-rate direct DFE receiver with 59.6%horizontal eye opening under 23.3-db channel loss at nyquist frequency Journal article
Yong Chen, Pui-In Mak, Li Zhang, Yan Wang. A 0.002-mm2 6.4-mW 10-Gb/s full-rate direct DFE receiver with 59.6%horizontal eye opening under 23.3-db channel loss at nyquist frequency[J]. IEEE Transactions on Microwave Theory and Techniques, 2014, 62(12), 3107-3117.
Authors:  Yong Chen;  Pui-In Mak;  Li Zhang;  Yan Wang
Favorite | TC[WOS]:19 TC[Scopus]:23  IF:4.1/4.2 | Submit date:2019/02/12
Active Inductor (Ai)  Analog One-tap Nonreturn-to-zero (Nrz) Feedback  Bathtub Curve  Bit Error Rate (Ber)  Channel Loss  Clocked-one-tap Return-to-zero (Rz) Feedback  Cmos  Decision Feedback Equalization (Dfe) Receiver  Horizontal Eye Opening  Pseudorandom Binary Sequence (Prbs)  Vertical Eye Opening