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A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector Conference paper
Ge, Xinyi, Chen, Yong, Wang, Lin, Qi, Nan, Mak, Pui In, Martins, Rui P.. A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector[C]:IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA, 2022.
Authors:  Ge, Xinyi;  Chen, Yong;  Wang, Lin;  Qi, Nan;  Mak, Pui In; et al.
Favorite | TC[WOS]:4 TC[Scopus]:5 | Submit date：2023/01/30
Bang-bang Phase Detector (Bbpd)  Charge Steering  Clock And Data Recovery (Cdr)  Cmos  Half Rate  Non- Return-to-zero (Nrz)  Quadrature Voltage-controlled Oscillator (Qvco)  Return-to-zero (Rz)  Rz-to-nrz Converter  
A 0.002-mm2 6.4-mW 10-Gb/s full-rate direct DFE receiver with 59.6%horizontal eye opening under 23.3-db channel loss at nyquist frequency Journal article
Yong Chen, Pui-In Mak, Li Zhang, Yan Wang. A 0.002-mm2 6.4-mW 10-Gb/s full-rate direct DFE receiver with 59.6%horizontal eye opening under 23.3-db channel loss at nyquist frequency[J]. IEEE Transactions on Microwave Theory and Techniques, 2014, 62(12), 3107-3117.
Authors:  Yong Chen;  Pui-In Mak;  Li Zhang;  Yan Wang
Favorite | TC[WOS]:19 TC[Scopus]:23  IF:4.1/4.2 | Submit date：2019/02/12
Active Inductor (Ai)  Analog One-tap Nonreturn-to-zero (Nrz) Feedback  Bathtub Curve  Bit Error Rate (Ber)  Channel Loss  Clocked-one-tap Return-to-zero (Rz) Feedback  Cmos  Decision Feedback Equalization (Dfe) Receiver  Horizontal Eye Opening  Pseudorandom Binary Sequence (Prbs)  Vertical Eye Opening