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Study on the equivalent coefficients of seismic-induced track dynamic irregularities based on post-seismic running performance Journal article
Shaohui, Liu, Lizhong, Jiang, Wangbao, Zhou, Wangji, Yan, Jian, Yu, Zhenbin, Ren, Jun, Xiao. Study on the equivalent coefficients of seismic-induced track dynamic irregularities based on post-seismic running performance[J]. Structures, 2024, 68, 107225.
Authors:  Shaohui, Liu;  Lizhong, Jiang;  Wangbao, Zhou;  Wangji, Yan;  Jian, Yu; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:3.9/3.9 | Submit date：2024/10/10
Equivalent Coefficient  Ground Motion Intensity  Root Mean Square Velocity  Seismic-induced Dynamic Irregularity  Structural Natural Vibration Periods  
Crafting adversarial example with adaptive root mean square gradient on deep neural networks Journal article
Xiao,Yatie, Pun,Chi Man, Liu,Bo. Crafting adversarial example with adaptive root mean square gradient on deep neural networks[J]. NEUROCOMPUTING, 2020, 389, 179-195.
Authors:  Xiao,Yatie;  Pun,Chi Man;  Liu,Bo
Favorite | TC[WOS]:6 TC[Scopus]:9  IF:5.5/5.5 | Submit date：2021/03/11
Adversarial Example  Adaptive Gradient  Root Mean Square  Perturbation  
A 0.0056-mm2 -249-dB-FoM All-Digital MDLL using a block-sharing offset-free frequency-tracking loop and dual multiplexed-ring VCOs Journal article
Shiheng Yang, Jun Yin, Pui-In Mak, Rui P. Martins. A 0.0056-mm2 -249-dB-FoM All-Digital MDLL using a block-sharing offset-free frequency-tracking loop and dual multiplexed-ring VCOs[J]. IEEE Journal of Solid-State Circuits, 2019, 54(1), 88-98.
Authors:  Shiheng Yang;  Jun Yin;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:27 TC[Scopus]:28  IF:4.6/5.6 | Submit date：2019/02/11
Clock Multiplier  Digital-controlled Delay Line (Dcdl)  Frequency-tracking Loop (Ftl)  Injection-locked Phase-locked Loop (Il-pll)  Multiplying Delay-locked Loop (Mdll)  Phase Noise  Ring Voltage-controlled Oscillator (Rvco)  Root-mean-square (Rms) Jitter  
A 0.0056-mm² -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs Journal article
Yang, S., Yin, J., Mak, P. I., Martins, R. P.. A 0.0056-mm² -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2019, 88-98.
Authors:  Yang, S.;  Yin, J.;  Mak, P. I.;  Martins, R. P.
Favorite | TC[WOS]:27 TC[Scopus]:28  IF:4.6/5.6 | Submit date：2022/01/24
Clock Multiplier  Digital-controlled Delay Line (Dcdl)  Frequency-tracking Loop (Ftl)  Injection-locked Phase-locked Loop (Il-pll)  Multiplying Delay-locked Loop (Mdll)  Phase Noise  Ring Voltage-controlled Oscillator (Rvco)  Root-mean-square (Rms) Jitter  
An Efficient Numerical Scheme for Simulation of Mean-Reverting Square-Root Diffusions Journal article
Deng DING, C. I. CHAO. An Efficient Numerical Scheme for Simulation of Mean-Reverting Square-Root Diffusions[J]. Journal of Numerical Mathematics and Stochastics, 2010, 1(1), 45-55.
Authors:  Deng DING;  C. I. CHAO
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2019/07/09
Mean-reverting  Square-root Diffusion  Simulation  Positivity Preservation  Splitting-step Algorithm