English | 繁體

Search in the results

UM

Browse/Search Results:  1-5 of 5 Help

Selected(0)Clear Items/Page:    Sort:
A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS Journal article
Zhang,Chenghao, Wei,Jiangbo, Chen,Yong, Liu,Maliang, Yang,Yintang. A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2023, 58(11), 3179-3193.
Authors:  Zhang,Chenghao;  Wei,Jiangbo;  Chen,Yong;  Liu,Maliang;  Yang,Yintang
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.6/5.6 | Submit date：2023/08/03
Analog-to-digital Converter (Adc)  Calibration  Cmos  Folding  Gated Ring Oscillator (Gro)  Interpolation  Pulse Generator (Pg)  Time Domain (Td)  Voltage Domain (Vd)  
All-at-once method for variable-order time fractional diffusion equations Journal article
Pang, Hong Kui, Qin, Hai Hua, Sun, Hai Wei. All-at-once method for variable-order time fractional diffusion equations[J]. Numerical Algorithms, 2022, 90(1), 31-57.
Authors:  Pang, Hong Kui;  Qin, Hai Hua;  Sun, Hai Wei
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:1.7/1.9 | Submit date：2022/05/13
All-at-once  Divide-and-conquer  Finite Difference Method  Low-rank  Polynomial Interpolation  Vo Time Fractional Derivative  
An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC with <1.5-ps Uncalibrated Quantization Steps Journal article
Zhang,Minglei, Zhu,Yan, Chan,Chi Hang, Martins,Rui P.. An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC with <1.5-ps Uncalibrated Quantization Steps[J]. IEEE Journal of Solid-State Circuits, 2020, 55(12), 3225-3235.
Authors:  Zhang,Minglei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite | TC[WOS]:34 TC[Scopus]:38  IF:4.6/5.6 | Submit date：2021/03/04
Analog-to-digital Converter (Adc)  High-speed Adc  Metastability  Process  Supply Voltage  And Temperature (Pvt) Robustness  Time Interpolation  Time Residue  Time-domain Adc  Time-to-digital Converter (Tdc)  
A 4x Time-Domain Interpolation 6-bit 3.4GS/s 12.6mW Flash ADC in 65nm CMOS Journal article
Liu, J., Chan, C.H., Sin, S. W., U, S.P., Martins, R. P.. A 4x Time-Domain Interpolation 6-bit 3.4GS/s 12.6mW Flash ADC in 65nm CMOS[J]. Journal of Semiconductor Technology and Science, 2016, 395-404.
Authors:  Liu, J.;  Chan, C.H.;  Sin, S. W.;  U, S.P.;  Martins, R. P.
Favorite |   IF:0.5/0.3 | Submit date：2022/01/24
Flash ADC  time comparator  4x time-domain interpolation  SR-latch  
A 4x time-domain interpolation 6-bit 3.4 Gs/s 12.6 mw flash ADC in 65 nm CMOS Journal article
Jianwei Liu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. A 4x time-domain interpolation 6-bit 3.4 Gs/s 12.6 mw flash ADC in 65 nm CMOS[J]. Journal of Semiconductor Technology and Science, 2016, 16(4), 395-404.
Authors:  Jianwei Liu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite | TC[WOS]:1 TC[Scopus]:1 | Submit date：2019/02/11
4x Time-domain Interpolation  Flash Adc  Sr-latch  Time Comparator