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UAV-Assisted Multi-Access Computation Offloading Via Hybrid NOMA and FDMA in Marine Networks Journal article
Dai Minghui, Wu Yuan, Qian Liping, Su Zhou, Lin Bin, Chen Nan. UAV-Assisted Multi-Access Computation Offloading Via Hybrid NOMA and FDMA in Marine Networks[J]. IEEE Transactions on Network Science and Engineering, 2023, 10(1), 113 - 127.
Authors:  Dai Minghui;  Wu Yuan;  Qian Liping;  Su Zhou;  Lin Bin; et al.
Favorite | TC[WOS]:34 TC[Scopus]:45  IF:6.7/6.0 | Submit date：2023/01/30
And Energy Efficiency  Computational Modeling  Data Communication  Energy Consumption  Frequency Division Multiaccess  Marine Networks  Multi-access Computation Offloading  Noma  Optimization  Sea Surface  
Optimal Resource Allocation for Computation Offloading in Maritime Communication Networks: An Energy-Efficient Design via Matching Game Conference paper
Dai Minghui, Luo Zhishen, Wang Tianshun, Wu Yuan, Qian Liping, Lin Bin. Optimal Resource Allocation for Computation Offloading in Maritime Communication Networks: An Energy-Efficient Design via Matching Game[C], 2022, 187-199.
Authors:  Dai Minghui;  Luo Zhishen;  Wang Tianshun;  Wu Yuan;  Qian Liping; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2023/03/06
Computation Offloading  Energy Efficiency  Maritime Communication Networks  
An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications Journal article
Li, Jixuan, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(9), 3143-3147.
Authors:  Li, Jixuan;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:40 TC[Scopus]:51  IF:4.0/3.7 | Submit date：2021/09/20
Computation Efficiency  Convolutional Neural Network (Cnn)  Fpga  Object Recognition  Reconfigurability  
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancemen Conference paper
Li, J., Chen, J., Un, K. F., Yu, W. H., Mak, P. I., Martins, R. P.. A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancemen[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021.
Authors:  Li, J.;  Chen, J.;  Un, K. F.;  Yu, W. H.;  Mak, P. I.; et al.
Favorite | TC[WOS]:2  | Submit date：2022/01/25
Computation Efficiency  Convolutional Neural Network (Cnn)  Fpga  Object Recognition  Reconfigurability  
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement Conference paper
Li, Jixuan, Chen, Jiabao, Un, Ka Fai, Yu, Wei Han, Mak, Pui In, Martins, Rui P.. A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021.
Authors:  Li, Jixuan;  Chen, Jiabao;  Un, Ka Fai;  Yu, Wei Han;  Mak, Pui In; et al.
Favorite | TC[WOS]:2 TC[Scopus]:5 | Submit date：2023/03/30
Computation Efficiency  Convolutional Neural Network (Cnn)  Fpga  Object Recognition  Reconfigurability