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A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM Journal article
Ren, Hongyu, Yang, Zunsong, Huang, Yunbo, Feng, Chaoping, Chen, Tianle, Zhang, Xinming, Meng, Xianghe, Yan, Weiwei, Zhang, Weidong, Iizuka, Tetsuya, Chen, Yong, Mak, Pui In, Han, Zhengsheng, Li, Bo. A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootstrapped DSPD and Retimer-Less MMD Achieving −92-dBc Reference Spur and −258-dB FOM[J]. IEEE Microwave and Wireless Technology Letters, 2024, 34(5), 548-551.
Authors:  Ren, Hongyu;  Yang, Zunsong;  Huang, Yunbo;  Feng, Chaoping;  Chen, Tianle; et al.
Favorite | TC[WOS]:0 TC[Scopus]:2  IF:0/0 | Submit date：2024/05/16
Double Sampling (Ds)  Figure Of Merit (Fom)  Frequency Synthesizer  Low Jitter  Low Spur  Phase Detector (Pd)  Phase-locked Loop (Pll)  Phase Noise (Pn)  Reference Sampling (Rs)  Subsampling (Ss)  Phase Locked Loops  Type-i  
Subranging BJT-Based CMOS Temperature Sensor With a ±0.45 °C Inaccuracy (3σ) From −50 °C to 180 °C and a Resolution-FoM of 7.2 pJ·K² at 150 °C Journal article
Bo Wang, Man-Kay Law. Subranging BJT-Based CMOS Temperature Sensor With a ±0.45 °C Inaccuracy (3σ) From −50 °C to 180 °C and a Resolution-FoM of 7.2 pJ·K² at 150 °C[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2022, 57(12), 3693-3703.
Authors:  Bo Wang;  Man-Kay Law
Favorite | TC[WOS]:10 TC[Scopus]:10  IF:4.6/5.6 | Submit date：2023/02/20
Bjt  Calibration  Double-sampling Adc  Lowleakage Switch  Subranging Readout  Temperature Sensor  
A BJT-Based CMOS Temperature Sensor Achieving an Inaccuracy of pm 0.45C(3) from °50°C to 180°C and a Resolution-FoM of 7.2pJ.K2at 150°C Conference paper
Bo Wang, Man-Kay Law, Amine Bermak. A BJT-Based CMOS Temperature Sensor Achieving an Inaccuracy of pm 0.45C(3) from °50°C to 180°C and a Resolution-FoM of 7.2pJ.K2at 150°C[C], 2022, 72-74.
Authors:  Bo Wang;  Man-Kay Law;  Amine Bermak
Favorite | TC[WOS]:10 TC[Scopus]:9 | Submit date：2022/05/17
Temperature Sensor  Subranging Readout  Low-leakage Switch  Double-sampling Adc  Calibration  Bjt  
A Readout Circuit for Tactile Sensor with Crosstalk Suppression and Non-Uniformity Compensation Conference paper
Li, Yao, Zhao, Yiqiang, Ye, Mao, Chen, Yong. A Readout Circuit for Tactile Sensor with Crosstalk Suppression and Non-Uniformity Compensation[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2021, 181-184.
Authors:  Li, Yao;  Zhao, Yiqiang;  Ye, Mao;  Chen, Yong
Favorite | TC[WOS]:1 TC[Scopus]:0 | Submit date：2022/05/13
Cmos  Correlated Double Sampling (Cds)  Crosstalk Suppression  Non-uniformity Compensation  Readout Circuit  Serial Peripheral Interface (Spi)  Successive-approximation-register (Sar) Analog-to-digital Converter (Adc)  Tactile Sensor  
Low-Power CMOS Laser Doppler Imaging Using Non-CDS Pixel Readout and 13.6-bit SAR ADC Journal article
Chen D.G., Law M.-K., Lian Y., Bermak A.. Low-Power CMOS Laser Doppler Imaging Using Non-CDS Pixel Readout and 13.6-bit SAR ADC[J]. IEEE Transactions on Biomedical Circuits and Systems, 2016, 10(1), 186-199.
Authors:  Chen D.G.;  Law M.-K.;  Lian Y.;  Bermak A.
Favorite | TC[WOS]:5 TC[Scopus]:6 | Submit date：2019/02/14
Cmos Image Sensor  Correlated Double Sampling (Cds)  Flowmetry  Laser Doppler Imaging (Ldi)  Perfusion  Successive-approximation-register Analog-to-digital-converter (Sar Adc)  Time-domain Comparator  
A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors Journal article
Chen D.G., Tang F., Law M.-K., Zhong X., Bermak A.. A 64 fJ/step 9-bit SAR ADC array with forward error correction and mixed-signal CDS for CMOS image sensors[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2014, 61(11), 3085-3093.
Authors:  Chen D.G.;  Tang F.;  Law M.-K.;  Zhong X.;  Bermak A.
Favorite | TC[WOS]:39 TC[Scopus]:46 | Submit date：2019/02/14
Cmos Image Sensor (Cis)  Column-parallel Sar Adc  Correlated Double Sampling (Cds)  Error Correction  Single-ended Adc  
A novel low-voltage 2nd-order Sigma-Delta Modulator with double-sampling for GSM/DECT/WCDMA Conference paper
Chio K., Martins R.P., Sengpan U.. A novel low-voltage 2nd-order Sigma-Delta Modulator with double-sampling for GSM/DECT/WCDMA[C], 2004, 1146-1150.
Authors:  Chio K.;  Martins R.P.;  Sengpan U.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2019/02/11
Double-sampling  Moving Sum  Rdwa  Sigma Delta  
I/Q imbalance modeling of quadrature wireless transceiver analog front-ends in SIMULINK Conference paper
Pui-In Mak, Weng-Ieng Mok, Seng-Pan U, R.P. Martins. I/Q imbalance modeling of quadrature wireless transceiver analog front-ends in SIMULINK[C], 2003, 2371-2374.
Authors:  Pui-In Mak;  Weng-Ieng Mok;  Seng-Pan U;  R.P. Martins
Favorite | TC[WOS]:0 TC[Scopus]:3 | Submit date：2019/02/11
Analog Front-end  Analog-double Quadrature Sampling  I/q Imbalance  Image-rejection  Quadrature Transceiver  
A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement Conference paper
Pui-In Mak, Seng-Pan U, R.P. Martins. A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement[C], 2003, 631-634.
Authors:  Pui-In Mak;  Seng-Pan U;  R.P. Martins
Favorite | TC[Scopus]:3 | Submit date：2019/02/11
Complex-if Receiver  Dcs1800  Double Quadrature Sampling/down-conversion  I/q Mismatch  Image-rejection  
Frequency-downconversion and if channel selection A-DQS sample-and-hold pair for two-step-channel-select low-if receiver Conference paper
Pui-In Mak, Chi-Sam SOU, Seng-Pan U, R.P. Martins. Frequency-downconversion and if channel selection A-DQS sample-and-hold pair for two-step-channel-select low-if receiver[C], 2003, 479-482.
Authors:  Pui-In Mak;  Chi-Sam SOU;  Seng-Pan U;  R.P. Martins
Favorite | TC[WOS]:3 TC[Scopus]:5 | Submit date：2019/02/11
Analag-double Quadrature Sampling  Channel Selection  Complex Low-if Receiver  Frequency Downconversion