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A 50-Gb/s 1.35-pJ/b PAM-4 VCSEL Transmitter With Three-Tap Asymmetric FFE and Current-Resue Technique in 40-nm CMOS Journal article
Yang, Jian, Peng, Yi, Yin, Jun, Mak, Pui In, Pan, Quan. A 50-Gb/s 1.35-pJ/b PAM-4 VCSEL Transmitter With Three-Tap Asymmetric FFE and Current-Resue Technique in 40-nm CMOS[J]. IEEE Transactions on Microwave Theory and Techniques, 2024.
Authors:  Yang, Jian;  Peng, Yi;  Yin, Jun;  Mak, Pui In;  Pan, Quan
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.1/4.2 | Submit date：2025/01/13
Asymmetric Equalization  Bandwidth Extension  Binary-to-thermal (B2t)  Cmos  Current Reuse  Driver  Feedforward Equalization (Ffe)  Four-level Pulse Amplitude Modulation (Pam-4)  Light-current–voltage (L-i–v)  Optical Transmitter (Tx)  Vertical-cavity Surface-emitting Laser (Vcsel)  
An Improved PSC-PWM Method for Modular Multilevel Converters with Reduced Harmonic Content in Common-Mode Voltage Conference paper
Gao, Jian, Zhang, Weitao, Zhang, Bin. An Improved PSC-PWM Method for Modular Multilevel Converters with Reduced Harmonic Content in Common-Mode Voltage[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 494-498.
Authors:  Gao, Jian;  Zhang, Weitao;  Zhang, Bin
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2024/09/03
Common-mode Voltage (Cmv)  Modular Multilevel Converters (Mmc)  Phase-shifted Carrier Pulse-width Modulation (Psc-pwm)  
Dual-Phase-Shifted Pulse Width Modulation of Three-Phase Modular Multilevel Converters Journal article
Zhou,Zhipeng, Dai,Ningyi, Liu,Li, Yin,Jiapeng. Dual-Phase-Shifted Pulse Width Modulation of Three-Phase Modular Multilevel Converters[J]. IEEE Transactions on Industrial Electronics, 2024, 71(2), 1927-1937.
Authors:  Zhou,Zhipeng;  Dai,Ningyi;  Liu,Li;  Yin,Jiapeng
Favorite | TC[WOS]:5 TC[Scopus]:8  IF:7.5/8.0 | Submit date：2023/08/03
Carrier Phase-shifted Pulse-width Modulation (Cps-pwm)  Harmonic  Line-to-line Voltage  Modular Multilevel Converter (Mmc)  
A Single-Stage Bipolar-Output Regulating Rectifier With Negligible Cross-Regulation for Wireless Display Journal article
Huang, Chenyu, Zhan, Chenchang, Bai, Xianglong, Lu, Yan. A Single-Stage Bipolar-Output Regulating Rectifier With Negligible Cross-Regulation for Wireless Display[J]. IEEE Journal of Solid-State Circuits, 2024, 1-12.
Authors:  Huang, Chenyu;  Zhan, Chenchang;  Bai, Xianglong;  Lu, Yan
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/07/17
Active Rectifier  Bipolar Output  Dual Output  Positive And Negative Voltages  Pulse Width Modulation  Receiver (Rx)  Rectifiers  Regulation  Series Resonant  Single-stage Regulating Rectifier  Transient Analysis  Transistors  Voltage Control  Wireless Communication  Wireless Power Transfer (Wpt)  
A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS Journal article
Zhang,Chenghao, Wei,Jiangbo, Chen,Yong, Liu,Maliang, Yang,Yintang. A 0.004-mm2 3.65-mW 7-Bit 2-GS/s Single-Channel GRO-Based Time-Domain ADC Incorporating Dead-Zone Elimination and On-Chip Folding-Offset Calibration in 28-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2023, 58(11), 3179-3193.
Authors:  Zhang,Chenghao;  Wei,Jiangbo;  Chen,Yong;  Liu,Maliang;  Yang,Yintang
Favorite | TC[WOS]:2 TC[Scopus]:2  IF:4.6/5.6 | Submit date：2023/08/03
Analog-to-digital Converter (Adc)  Calibration  Cmos  Folding  Gated Ring Oscillator (Gro)  Interpolation  Pulse Generator (Pg)  Time Domain (Td)  Voltage Domain (Vd)  
A 1-A Switching LDO with 40-mV Dropout Voltage and Fast DVS Journal article
Xiangyu Mao, Yan Lu, Rui P. Martins. A 1-A Switching LDO with 40-mV Dropout Voltage and Fast DVS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, 70(9), 3454-3458.
Authors:  Xiangyu Mao;  Yan Lu;  Rui P. Martins
Favorite | TC[WOS]:3 TC[Scopus]:3  IF:4.0/3.7 | Submit date：2023/08/03
Bandwidth  Capacitors  Control Systems  Dynamic Voltage Scaling (Dvs)  Fully Integrated Voltage Regulator (Fivr)  Low-dropout Regulator (Ldo)  Power Transistors  Pulse Width Modulation  Pwm Control  Switches  Switching Ldo  Type Iii Compensation  Voltage Control  
Pulse-Voltage-Based Method of Thermal Parameter Extraction for Thermopile Infrared Sensors Journal article
Yuan, Tianhui, Fu, Jianyu, Chen, Yong, Lu, Yihong, Hou, Ying, Sun, Guanjun, Chen, Dapeng. Pulse-Voltage-Based Method of Thermal Parameter Extraction for Thermopile Infrared Sensors[J]. IEEE Sensors Journal, 2023, 23(6), 5593-5600.
Authors:  Yuan, Tianhui;  Fu, Jianyu;  Chen, Yong;  Lu, Yihong;  Hou, Ying; et al.
Favorite | TC[WOS]:1 TC[Scopus]:2  IF:4.3/4.2 | Submit date：2023/04/03
Pulse Voltage  Self-test  Thermal Parameters  Thermopile Infrared (Ir) Sensor  
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS Journal article
Zhao, Xiaoteng, Chen, Yong, Mak, Pui In, Martins, Rui P.. A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 57(2), 546-561.
Authors:  Zhao, Xiaoteng;  Chen, Yong;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:15 TC[Scopus]:15  IF:4.6/5.6 | Submit date：2021/10/28
Acquisition Speed  Bang-bang Clock And Data Recovery (Bbcdr)  Charge Pump (Cp)  Clocks  Cmos  Detectors  Four-level Pulse Amplitude Modulation (Pam-4)  Frequency Detector (Fd)  Frequency Modulation  Hybrid Control Circuit (Hcc)  Jitter  Jitter Tolerance (Jtol)  Jitter Transfer Function (Jtf)  Logic Gates  Phase Detector (Pd)  Strobe Point (Sp).  Switches  Voltage-controlled Oscillators  
A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS Journal article
Wu, Jiangchao, Leong, Hou-Man, Jiang, Yang, Law, Man-Kay, Mak, Pui-In, Martins, Rui P.. A Fully-Integrated 10-V Pulse Driver Using Multi-Band Pulse-Frequency Modulation in 65-nm CMOS[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 29(9), 1665 - 1669.
Authors:  Wu, Jiangchao;  Leong, Hou-Man;  Jiang, Yang;  Law, Man-Kay;  Mak, Pui-In; et al.
Favorite | TC[WOS]:0 TC[Scopus]:1  IF:2.8/2.8 | Submit date：2022/08/20
Driver  Fast Transition  Fully Integrated  High-voltage (Hv)  Pulse-frequency Modulation (Pfm)  
A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques Journal article
Huang, Yunbo, Chen, Yong, Jiao, Hailong, Mak, Pui In, Martins, Rui P.. A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(9), 3093-3097.
Authors:  Huang, Yunbo;  Chen, Yong;  Jiao, Hailong;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:21 TC[Scopus]:21  IF:4.0/3.7 | Submit date：2021/09/20
Cmos  Narrow Pulse Shielding  Reference (Ref) Feedthrough Suppression  Sampling Phase-locked Loop (S-pll)  T-shape Switch  Type-i  Voltage-controlled Oscillator (Vco)