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Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review Journal article
Lai, Li Fang, Ramiah, Harikrishnan, Tan, Yee Chyan, Lai, Nai Shyan, Lim, Chee Cheow, Chen, Yong, Mak, Pui In, Martins, Rui P.. Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review[J]. IEEE Access, 2023, 11, 85237-85258.
Authors:  Lai, Li Fang;  Ramiah, Harikrishnan;  Tan, Yee Chyan;  Lai, Nai Shyan;  Lim, Chee Cheow; et al.
Favorite | TC[WOS]:5 TC[Scopus]:6  IF:3.4/3.7 | Submit date：2024/02/23
Analog-assisted  Asynchronous  Cmos Process  Digital Low-dropout (Dldo) Regulators  Event-driven  Hybrid  Power Management Integrated Circuit (Pmic)  Self-clocked  Synchronous  System-on-chip (Soc)  
A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC–DC Converter Achieving a Fast DVS up to 222.5 mV/ns Journal article
Li, Feiyu, Fang, Qishen, Wu, Jiangchao, Jiang, Yang, Mak, Pui In, Martins, Rui P., Law, Man Kay. A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC–DC Converter Achieving a Fast DVS up to 222.5 mV/ns[J]. IEEE Journal of Solid-State Circuits, 2023, 59(6), 1747-1758.
Authors:  Li, Feiyu;  Fang, Qishen;  Wu, Jiangchao;  Jiang, Yang;  Mak, Pui In; et al.
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:4.6/5.6 | Submit date：2024/02/22
Capacitors  Delays  Dynamic Voltage Scaling (Dvs)  Multi-phase  Power System Dynamics  Switched-capacitor (Sc) Dc–dc Converter  Switches  System-on-chip  Video Recording  Voltage Control  Voltage Conversion Ratio (Vcr)  
Complex in vitro 3D models of digestive system tumors to advance precision medicine and drug testing: Progress, challenges, and trends Review article
2022
Authors:  Song, Sheng Lei;  Li, Bo;  Carvalho, Mariana R.;  Wang, Hui Jin;  Mao, De Li; et al.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:12.0/12.5 | Submit date：2022/12/01
Cancer-on-a-chip  Digestive System Cancer  In Vitro 3d Models  Organoids  Tumor Microenvironment  
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier Journal article
Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi Hang Chan, Jan Craninckx, Rui P. Martins. A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier[J]. IEEE Journal of Solid-State Circuits, 2021.
Authors:  Zihao Zheng;  Lai Wei;  Jorge Lagos;  Ewout Martens;  Yan Zhu; et al.
Favorite | TC[WOS]:8 TC[Scopus]:9  IF:4.6/5.6 | Submit date：2021/09/20
Analog-to-digital Conversion  Calibration  Calibration  Dynamic Amplifier (Da)  Hardware  Linearity  Linearization Technique  Pipeline Processing  Pipelined Analog-to-digital Converter (Adc).  Quantization (Signal)  Signal Resolution  System-on-chip  
Organoids and Microphysiological Systems: New Tools for Ophthalmic Drug Discovery Review article
2020
Authors:  Bai,Jing;  Wang,Chunming
Favorite | TC[WOS]:32 TC[Scopus]:38  IF:4.4/5.0 | Submit date：2021/03/02
3d Tissue Constructs  Microphysiological System  Ocular  Organ-on-a-chip  Organoid  
16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation Conference paper
Zheng, Z., Wei, W., Lagos, J., Martens, E., Zhu, Y., Chan, C. H., Craninckx, J., Martins, R. P.. 16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation[C], 2020.
Authors:  Zheng, Z.;  Wei, W.;  Lagos, J.;  Martens, E.;  Zhu, Y.; et al.
Favorite |  | Submit date：2022/01/25
Amplifiers  Analogue-digital Conversion  Calibration  Interpolation  Dynamic Pipelined Adc  Dynamic Pipelined Architecture  Linearized Dynamic Amplifier  Post-amplification Residue Generation Scheme  Residue Amplification  Complex Residue-transferring Realization  Residue Amplifier  Power Consumption  Sar Adc  Calibration Complexity  Aggressive Interpolation Factor  Flash Adc  Mm-wave 5g Receivers  Adc-based Serial Links  Power 5.5 Mw  Calibration  Quantization (Signal)  Clocks  System-on-chip  Interpolation  Prototype  
Multiplying DLLs Book chapter
出自: Phase-Locked Frequency Generation and Clocking: Architectures and circuits for modern wireless and wireline systems, INST ENGINEERING TECH-IET, MICHAEL FARADAY HOUSE, STEVENAGE, HERTS SG1 2AY, ENGLAND:Institution of Engineering and Technology, 2020, 页码:645-664
Authors:  Yang, Shiheng;  Yin, Jun;  Mak, Pui In;  Martins, Rui P.
Favorite | TC[WOS]:0 TC[Scopus]:0 | Submit date：2021/12/03
Clocks  Delay Lock Loops  Jitter  Low-power Electronics  Multiplying Circuits  System-on-chip  Voltage-controlled Oscillators  
Pulsatile shear stress and high glucose concentrations induced cell death in endothelial cells Conference paper
Yu J.Q., Chin L.K., Liu A.Q., Luo K.Q.. Pulsatile shear stress and high glucose concentrations induced cell death in endothelial cells[C], 2011, 837-839.
Authors:  Yu J.Q.;  Chin L.K.;  Liu A.Q.;  Luo K.Q.
Favorite |  | Submit date：2018/12/18
Cell Death  Endothelial Cell  Hemodynamic Lab-on-a-chip System  
A system-on-chip EPC Gen-2 passive UHF RFID tag with embedded temperature sensor Journal article
Yin J., Yi J., Law M.K., Ling Y., Lee M.C., Ng K.P., Gao B., Luong H.C., Bermak A., Chan M., Ki W.-H., Tsui C.-Y., Yuen M.. A system-on-chip EPC Gen-2 passive UHF RFID tag with embedded temperature sensor[J]. IEEE Journal of Solid-State Circuits, 2010, 45(11), 2404-2420.
Authors:  Yin J.;  Yi J.;  Law M.K.;  Ling Y.;  Lee M.C.; et al.
Favorite | TC[WOS]:146 TC[Scopus]:184 | Submit date：2019/02/14
Clock  Energy Harvesting  Injection-locked  Low Power  Passive Tag  Radio-frequency Identification  Rfid  System-on-chip  Temperature Sensor  
The design and implementation of hardware task configuration management unit on dynamically reconfigurable SoC Conference paper
Wang X.-W., Chen W.-N., Wang Y., You H.-J., Peng C.-L.. The design and implementation of hardware task configuration management unit on dynamically reconfigurable SoC[C], 2009, 179-184.
Authors:  Wang X.-W.;  Chen W.-N.;  Wang Y.;  You H.-J.;  Peng C.-L.
Favorite | TC[WOS]:2 TC[Scopus]:2 | Submit date：2019/01/16
Configuration Management Unit  Dynamic Hardware Task  Dynamic Partial Reconfiguration  Operating System  System-on-chip