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An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R
Journal article
Xu, Zixuan, Xing, Kai, Zhu, Yan, Martins, Rui P., Chan, Chi Hang. An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R[J]. IEEE Journal of Solid-State Circuits, 2024, 59(3), 753-764.
Authors:
Xu, Zixuan
;
Xing, Kai
;
Zhu, Yan
;
Martins, Rui P.
;
Chan, Chi Hang
Favorite
|
TC[WOS]:
1
TC[Scopus]:
0
IF:
4.6
/
5.6
|
Submit date:2024/04/02
Ac-coupled Negative-r
Analog-to-digital Conversion (Adc)
Continuous-time Sigma-delta Modulator (Ct Sdm)
Noise-shaping Continuous Time Successive-approximation Register (Ns Ct-sar)
A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator
Journal article
Yue Hu, Yuekai Liu, Xinyu Qin, Yan Liu, Mingqiang Guo, Sai-Weng Sin, Guoxing Wang, Yong Lian, Liang Qi. A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 1-13.
Authors:
Yue Hu
;
Yuekai Liu
;
Xinyu Qin
;
Yan Liu
;
Mingqiang Guo
; et al.
Adobe PDF
|
Favorite
|
TC[WOS]:
2
TC[Scopus]:
2
IF:
5.2
/
4.5
|
Submit date:2023/08/22
Continuous-time Delta-sigma Modulator (Dsm)
Time-interleaved (Ti)
Cascaded Integrator Of Distributed Feedforward (Ciff)
Excess Loop Delay (Eld) Compensation
High-Performance Oversampling ADCs
Book chapter
出自: Analog Circuits and Signal Processing, Switzerland:Springer, 2023, 页码:181-218
Authors:
Chi-Hang Chan
;
Yan Zhu
;
Liang Qi
;
Sai Weng Sin
;
Maurits Ortmanns
; et al.
Favorite
|
TC[Scopus]:
0
|
Submit date:2023/08/03
Analog-to-digital Converter (Adc)
Cmos
Continuous-time Dsm (Ct Dsm)
Delta-sigma Modulator (Dsm)
Noise Shaping (Ns)
Oversampling
Pipeline Sar Adc
Successive Approximation Register (Sar)
On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators
Journal article
Jingying Zhang, Sai-Weng Sin, Yan Liu, Fan Ye, Guoxing Wang, Maurits Ortmanns, Liang Qi. On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 70(2), 356-360.
Authors:
Jingying Zhang
;
Sai-Weng Sin
;
Yan Liu
;
Fan Ye
;
Guoxing Wang
; et al.
Favorite
|
TC[WOS]:
1
TC[Scopus]:
1
IF:
4.0
/
3.7
|
Submit date:2023/01/30
Delta-sigma Modulator (Dsm)
Continuous-time (Ct)
Sturdy Multi-stage Noise-shaping (Smash)
Excess Loop Delay (Eld)
Loop-filter Connection
A Single-Opamp Third Order CT ΔΣ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp
Journal article
Xing, K., Wang, W., Zhu, Y., Chan, C. H., Martins, R. P.. A Single-Opamp Third Order CT ΔΣ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 64-74.
Authors:
Xing, K.
;
Wang, W.
;
Zhu, Y.
;
Chan, C. H.
;
Martins, R. P.
Favorite
|
IF:
5.2
/
4.5
|
Submit date:2023/08/31
Analog-to-digital conversion (ADC)
continuous-time delta-sigma modulator (CTDSM)
SAB-ELD- merged integrator
three-stage Opamp
preliminary sampling and quantization (PSQ) technique
high-speed noise-shaping SAR (NS-SAR)
A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp
Journal article
Xing, Kai, Wang, Wei, Zhu, Yan, Chan, Chi Hang, Martins, Rui P.. A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(1), 64-74.
Authors:
Xing, Kai
;
Wang, Wei
;
Zhu, Yan
;
Chan, Chi Hang
;
Martins, Rui P.
Favorite
|
TC[WOS]:
5
TC[Scopus]:
5
IF:
5.2
/
4.5
|
Submit date:2021/09/20
Analog-to-digital Conversion (Adc)
Continuous-time Delta-sigma Modulator (Ctdsm)
Gain
High-speed Noise-shaping Sar (ns-Sar).
Loading
Low-frequency Noise
Modulation
Preliminary Sampling And Quantization (Psq) Technique
Quantization (Signal)
Sab-eld-merged Integrator
Three-stage Opamp
Topology
Wideband
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization
Journal article
Wang,Wei, Chan,Chi Hang, Zhu,Yan, Martins,Rui P.. A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55(6), 1588-1598.
Authors:
Wang,Wei
;
Chan,Chi Hang
;
Zhu,Yan
;
Martins,Rui P.
Favorite
|
TC[WOS]:
14
TC[Scopus]:
15
IF:
4.6
/
5.6
|
Submit date:2020/12/04
Analog-to-digital Conversion (Adc)
Continuous-time Delta-sigma Modulator (Ct-dsm)
Preliminary Sampling And Quantization (Psq) Technique
Single Amplifier Biquad (Sab)
Successiveapproximation-register (Sar) Architecture-based Quantizer (Qtz)
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS
Conference paper
Wang, Wei, Zhu, Yan, Chan, Chi-Hang, Martins, Rui Paulo. A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS[C], 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA:IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2018, 2783-2794.
Authors:
Wang, Wei
;
Zhu, Yan
;
Chan, Chi-Hang
;
Martins, Rui Paulo
Favorite
|
TC[WOS]:
12
TC[Scopus]:
13
|
Submit date:2018/10/30
Terms-analog-to-digital Conversion (Adc)
Continuous-time (Ct) Delta-sigma Modulator
Dac Driver
Passive Integrator
Single Amplifier Biquad (Sab)
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS
Journal article
Wang,Wei, Zhu,Yan, Chan,Chi Hang, Martins,Rui Paulo. A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2018, 53(10), 2783-2794.
Authors:
Wang,Wei
;
Zhu,Yan
;
Chan,Chi Hang
;
Martins,Rui Paulo
Favorite
|
TC[WOS]:
12
TC[Scopus]:
13
|
Submit date:2019/08/22
Analog-to-digital Conversion (Adc)
Continuous-time (Ct) Delta-sigma Modulator
Dac Driver
Passive Integrator
Single Amplifier Biquad (Sab)
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS
Journal article
Wang W., Zhu Y., Chan C.-H., Martins R.P.. A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2018, 53(10), 2783-2794.
Authors:
Wang W.
;
Zhu Y.
;
Chan C.-H.
;
Martins R.P.
Favorite
|
TC[WOS]:
12
TC[Scopus]:
13
|
Submit date:2019/02/11
Analog-to-digital Conversion (Adc)
Continuous-time (Ct) Delta-sigma Modulator
Dac Driver
Passive Integrator
Single Amplifier Biquad (Sab)